The present invention relates generally to a method of and apparatus for manufacturing an integrated circuit (IC). More specifically, this invention relates to an apparatus for and method of dispensing resist in a track utilized to fabricate ICs.
The present invention applies particularly to the fabrication of semiconductor devices or integrated circuits. Some examples of these devices include non-volatile memory integrated circuits. Non-volatile memory integrated circuits include an EPROM, an EEPROM, a flash memory device, and a complementary metal oxide semiconductor (xe2x80x9cCMOSxe2x80x9d) device. Exemplary devices may comprise transistors, such as metal oxide semiconductor field-effect transistors (xe2x80x9cMOSFETxe2x80x9d) containing a gate over a gate insulator over silicon, as well as other transistors utilized in ultra-large-scale integrated-circuit (xe2x80x9cULSIxe2x80x9d) systems.
Integrated circuits are utilized in a wide variety of commercial and military electronic devices, including, e.g., hand held telephones, radios and digital cameras. The market for these electronic devices continues to demand devices with a lower voltage, lower power consumption and a decreased chip size. Also, the demand for greater functionality is driving the xe2x80x9cdesign rulexe2x80x9d lower, for example, into the sub-half micron range.
These integrated circuit devices are generally fabricated in groups on a semiconductor wafer. During fabrication, a photolithographic process is utilized to form various components and structures. The components and structures are formed according to a photolithographic pattern provided on the semiconductor wafer. This photolithographic process is conventionally utilized throughout semiconductor wafer production. There are three basic steps involved in the photolithographic processing of each semiconductor wafer. First, a photoresist is applied to each wafer in a coater. Each wafer is then exposed to a radiation source in a stepper, and finally each exposed wafer is developed in a photoresist developer. Since the IC are typically multilayered, this process is repeated a number of times.
More specifically, in a portion of the photolithographic process, a photoresist coater and developer system is utilized in the patterning of various layers of the wafer that will form the structures on the wafer. The photoresist coater and developer system applies, or coats, a light-sensitive resin, i.e., a photoresist layer, to wafers by depositing a pre-selected amount of the photoresist solution. Next, the system spins the wafers at a relatively high rate of speed to distribute the photoresist into a relatively even coating over the wafer. Then, the wafers are baked to induce a volatization of a casting solvent in the photoresist. Next, the wafers are exposed to a light source in a stepper, e.g., a deep ultraviolet (xe2x80x9cDUVxe2x80x9d) light source, for patterning. The exposed wafers are then developed by a chemical treatment, and are again baked to dry the wafers.
Conventional examples of resist coater and developer systems, e.g., are the Tokyo Electron Limited (TEL) sub-half micron compatible Coater/Developer Clean Track systems. Conventional systems may include a chemically amplified resist (xe2x80x9cCARxe2x80x9d) in the deep ultraviolet (xe2x80x9cDUVxe2x80x9d) process that has been adopted for the sub-half micron design rule type of circuit devices. The combination of the coater and developer is typically referred to as a xe2x80x9ctrack.xe2x80x9d
As to the development of the photoresist that has been formed on the wafer, conventionally, a chemical developer is utilized to remove areas defined in the steps of masking and exposure of the photoresist layer that has been deposited on the wafer. The development of the photoresist is an important part of the wafer fabrication.
For example, in sub-half micron semiconductor processing, one of the most important parameters in the photolithography area is the critical dimension (xe2x80x9cCDxe2x80x9d). The above described relatively complex integrated circuits will only function as designed if the critical dimensions are within tolerance or specification. There are many parameters that control the critical dimension. One of these parameters comprises cleanliness. Thus, there is a requirement for an essentially contamination-free wafer fabrication environment.
As discussed above, IC""s are often multi-layered. Accordingly, once the lot of wafers has been processed, the process of photoresist application, exposure, and developing is repeated on the lot until the IC""s are completed. The type of photoresist that is applied for each layer of the IC may be different than the previous photoresists that have been applied. Additionally, a different type of photoresist may require a different developer material.
A track includes a least one resist application station or coater cup. Each application station includes three different nozzles that can apply a different resist to the wafers. In a typical setup with two different resist application stations the track has the ability to apply six different photoresists.
In order to minimize the possibility of contamination, only one resist is applied by a specific nozzle. The only way to select from additional resists is to either add additional resist applicaton stations, or to first clean the entire line and nozzle to ensure that no residue of the prior resist is present before applying a different resist.
In addition to the problem of contamination from a prior resist, certain resists react with one another and coagulate, further complicating the application and drainage of the resists.
Since, the fabrication of wafers often demands the use of a number of resists, a fabricator has the choice of cleaning out the various nozzles or purchasing additional resist application stations. The former approach results in excessive downtime, and the latter approach adds expense in the form of additional capital expenditure. Additionally, every new station that is added requires additional space thereby making transportation along the track longer and more complicated.
Accordingly, it would be desirable to develop a method of and apparatus for modifying existing track systems to permit the application of additional photoresists without the need for an additional applicator station.
One embodiment relates to a semiconductor resist applicator nozzle apparatus. A nozzle including a first end is coupled to an opening in a container. The nozzle includes a first and second orifice. A first resist line extends through the first opening of the container to supply a first resist to the first orifice. A second resist line extending through the container to supply a second resist to the second orifice.
Another embodiment includes a method for doubling the number of photoresists available in a resist applicator station. The resist applicator station is of the type having a nozzle holder block, at least one single tip nozzle attached to the nozzle holder block, and a first resist line extending through the nozzle holder block and into engagement with the single tip nozzle. The method includes removing the single tip nozzle from an opening in the nozzle holder block. A second resist applicator line is extended along with the first resist line through the nozzle holder block. A dual tip nozzle having a first cavity and a second cavity is coupled to the nozzle holder block, with the first and second resist lines located in the first and second cavities respectively.
A further embodiment includes a kit for modifying a resist applicator station. The resist applicator station is of the type having a nozzle holder block, at least one single tip nozzle attached to the nozzle holder bock, and a first resist line extending through the nozzle holder block and into engagement with the single tip nozzle. The kit includes a dual tip nozzle having a first attachment end. The dual tip nozzle also includes a first tip and a second tip. Each tip has a separate cavity with a respective orifice. The kit also includes a coupler to secure the attachment end of the dual tip nozzle to the nozzle holder block.